TECHNOLOGY 

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KembaraXtra-Computer Science-High-Level Programming
1. The Need for High-Level Languages
  • Problem with Assembly Language:
    • Time-consuming and error-prone.
    • Difficult to maintain.
    • CPU architecture-specific (not portable).
  • Solution: High-Level Languages
    • More human-readable syntax.
    • CPU-independent.
    • Promotes portability.
2. Compilation
  • Compiler: A program that translates high-level language code into machine code.
  • Portability: High-level languages allow you to compile code for different processors with minimal changes.
  • Output: The compiler produces an object file containing machine code for a specific processor.
3. Linking
  • Object Files: The output of compilation, but not directly executable.
  • Linker: A program that combines one or more object files into a single executable file.
    • Resolves dependencies and includes necessary code libraries.
    • Prepares the executable for the operating system to run.
4. The Build Process
  • Building Software: The complete process of converting source code to an executable file, encompassing compilation and linking.
  • Common Usage: Developers often say "compiling" to mean the entire build process.
  • Automation: Compilers often automatically invoke the linker, which obscures the linking step.



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KembaraXtra-Computer Science - Calculating Factorial in Machine Code

1. What is a Factorial?
• The factorial of a non-negative integer n, denoted by n!, is the product of all positive integers less than or equal to n.
• Example: 4! = 4 × 3 × 2 × 1 = 24

2. ARM Machine Code for Factorial Calculation
• The following code calculates the factorial of an integer n.
• Initial condition: n is stored in register r0.
• Final condition: n! (the factorial of n) is stored in register r0.

2.1. Machine Code in Memory
• Machine code is loaded into memory as hexadecimal values. Each instruction is 4 bytes (32 bits) long.

Address     Data
0001007c    e2503001
00010080    da000002
00010084    e0000093
00010088    e2533001
0001008c    1afffffc

2.2. Assembly Language Equivalent
• Disassembling the machine code gives the corresponding assembly language instructions:

Address     Data        Assembly
0001007c    e2503001    subs r3, r0, #1
00010080    da000002    ble 0x10090
00010084    e0000093    mul r0, r3, r0
00010088    e2533001    subs r3, r3, #1
0001008c    1afffffc    bne 0x10084
00010090                ---

• The code starts at address 0001007c and ends (factorial calculation) at address 00010090.

3. ARM Instructions Explained

Instruction       Details
subs Rd, Rn, #Const   Subtract: Subtracts the constant value Const from the value stored in register Rn and stores the result in register Rd. Rd = Rn - Const. Also, subs affects the status register (used for conditional branching).
mul Rd, Rn, Rm        Multiply: Multiplies the value stored in register Rn by the value stored in register Rm and stores the result in register Rd. Rd = Rn × Rm
ble Addr              Branch if less than or equal: If the previous operation's result was ≤ 0, jump to address Addr.
bne Addr              Branch if not equal: If the previous operation's result was not 0, jump to address Addr.

4. Branching and the Status Register
• ARM processors use a status register to track the results of operations.
• Specific bits in the status register (flags) indicate conditions like negative result, zero result, etc.
• Instructions like subs update the status flags.
• Branch instructions (e.g., ble, bne) check the status flags to determine whether to jump or continue.

5. Exercise: Understanding the Factorial Program
• Goal: Trace the execution of the assembly code to calculate the factorial of 4.
• Initial condition: r0 = 4
• Expected final result: r0 = 24

Procedure:
i. Create a table to track the values of r0 and r3 before and after each instruction.
ii. Execute each instruction sequentially, updating the register values accordingly.
iii. Pay attention to how the subs instructions affect the status flags and how the branch instructions (ble, bne) use these flags to control the flow of execution.
iv. Stop when the program reaches address 00010090.
v. Verify that r0 contains the value 24.

Assembly Code:

Address     Assembly
0001007c    subs r3, r0, #1
00010080    ble 0x10090
00010084    mul r0, r3, r0
00010088    subs r3, r3, #1
0001008c    bne 0x10084
00010090    ---

6. Additional Projects (See Text for Details)
• Project #12: Assemble the factorial code and examine it while it runs.
• Project #13: Learn additional approaches for examining machine code.

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KembaraXtra-Computer Science- Machine Instruction
ARM Processor Example: Moving the Number 4 into Register r7
  • Context: The example focuses on an ARM processor instruction, commonly found in smartphones.
  • Instruction Goal: The instruction moves the number 4 into the r7 register. Registers are small storage locations within the CPU.
  • Binary Representation: The instruction in binary form is: 11100011101000000111000000000100
  • Decoding the Binary:
    • Condition (1110): Specifies when the instruction is executed. 1110 means it's always executed (not conditional).
    • Immediate Bit (1): Indicates whether the instruction uses a direct value (immediate value) or a value from another register. 1 means it uses an immediate value (the number 4 in this case).
    • Opcode (mov): Represents the operation to be performed. mov means "move" data.
    • Destination Register (0111): Indicates the register where the value will be moved. 0111 is binary for 7, representing register r7.
    • Immediate Value (00000100): The actual value to be moved. 00000100 is binary for 4.
    • Summary: The binary translates to: "Move the number 4 into register r7."
Hexadecimal Representation
  • Purpose: A more compact and readable representation than binary.
  • Example: The same instruction in hexadecimal is: e3a07004
Assembly Language Representation
  • Definition: A programming language where each statement directly represents a machine language instruction. Each machine language has its assembly language (e.g., x86 assembly, ARM assembly).
  • Structure: Consists of a mnemonic (human-readable opcode) and operands (registers, values).
  • Mnemonic Example: mov is the mnemonic for the "move" operation.
  • Example Instruction: The same instruction in ARM assembly language is: mov r7, #4
  • Advantages: More readable and understandable for humans.
  • Important Note: CPUs only execute binary code. Assembly language is a human convenience.
Assembler
  • Function: A program that translates assembly language statements into machine code (binary).
  • Process:
    1. An assembly language text file (source code) is input.
    2. The assembler translates it into a binary object file (machine code).



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KembaraXtra-Case Law-Software Terms Defined
I. Key Definitions:
  • Software: Instructions that tell a computer what to do. Contrast: Hardware (physical components).
  • Program: An ordered set of software instructions that accomplishes a task. Related term: Programming (writing such programs).
  • Application: Often used synonymously with "program", but implies direct interaction with humans. Can consist of multiple programs. Related term: App (modern usage, connotations to be covered later).
  • Code (Computer Code): Another name for a set of software instructions.
  • Source Code: The text of a program as originally written by developers. Written in a higher-level programming language. Requires additional steps before execution.
  • Machine Code: Software in binary machine language instructions that a CPU can directly execute.
  • Machine Language: The set of instructions a specific CPU architecture understands.
II. Relationship between Code Types
  • Source Code --> Machine Code: Source code, written by developers, must be converted into machine code for the CPU to execute.
  • Universal Conversion: Regardless of the initial programming language or technologies used, all programs ultimately become a series of 0s and 1s representing CPU instructions.
III. Core Concept
  • "It's Just Code": Even complex software, when examined at its most fundamental level, is simply a series of instructions (0s and 1s) that a CPU interprets.
IV. Analogy
  • Human Language vs. Machine Language:
    • Vocabulary words are like CPU instructions.
    • Sentences formed from words are like programs formed from instructions. Both convey meaning.



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KembaraXtra-Computer Science-Bus Communication
Introduction
  • Explains how the CPU communicates with memory and I/O devices.
  • Focuses on the hardware communication system called a "bus."
What is a Bus?
  • A hardware communication system used by computer components.
  • Early buses were sets of parallel wires, each carrying an electrical signal (a bit).
  • Modern buses can be more complex, but the core principle of data transfer remains.
Three Common Bus Types
  1. Address Bus:
    • Selects the specific memory address the CPU wants to access.
    • The CPU writes the desired memory address onto the address bus.
    • Example: To access address 0x2FE, the CPU writes 0x2FE to the address bus.
  2. Data Bus:
    • Transfers the actual data being read from or written to memory.
    • For writing: The CPU writes the data to the data bus.
    • For reading: The CPU reads the data from the data bus.
    • Example: To write the value 25 to memory, the CPU writes 25 to the data bus.
  3. Control Bus:
    • Manages and coordinates operations across the address and data buses.
    • Carries signals indicating the type of operation (read or write).
    • Indicates the status of an operation.
    • Example: The CPU uses the control bus to signal a "write" operation.
Example: CPU Reading from Memory
  • Scenario: The CPU wants to read the value at memory address 000003F4.
  • Steps:
    1. The CPU writes 000003F4 to the address bus.
    2. The CPU sets a specific signal on the control bus to indicate a "read" operation.
    3. The memory controller (circuit managing memory interactions) receives these signals.
    4. The memory controller retrieves the data stored at address 000003F4 (which is 84 in the example).
    5. The memory controller writes the value 84 to the data bus.
    6. The CPU then reads the value 84 from the data bus.



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KembaraXtra-Computer Science-Bus Communication
Introduction
  • Explains how the CPU communicates with memory and I/O devices.
  • Focuses on the hardware communication system called a "bus."
What is a Bus?
  • A hardware communication system used by computer components.
  • Early buses were sets of parallel wires, each carrying an electrical signal (a bit).
  • Modern buses can be more complex, but the core principle of data transfer remains.
Three Common Bus Types
  1. Address Bus:
    • Selects the specific memory address the CPU wants to access.
    • The CPU writes the desired memory address onto the address bus.
    • Example: To access address 0x2FE, the CPU writes 0x2FE to the address bus.
  2. Data Bus:
    • Transfers the actual data being read from or written to memory.
    • For writing: The CPU writes the data to the data bus.
    • For reading: The CPU reads the data from the data bus.
    • Example: To write the value 25 to memory, the CPU writes 25 to the data bus.
  3. Control Bus:
    • Manages and coordinates operations across the address and data buses.
    • Carries signals indicating the type of operation (read or write).
    • Indicates the status of an operation.
    • Example: The CPU uses the control bus to signal a "write" operation.
Example: CPU Reading from Memory
  • Scenario: The CPU wants to read the value at memory address 000003F4.
  • Steps:
    1. The CPU writes 000003F4 to the address bus.
    2. The CPU sets a specific signal on the control bus to indicate a "read" operation.
    3. The memory controller (circuit managing memory interactions) receives these signals.
    4. The memory controller retrieves the data stored at address 000003F4 (which is 84 in the example).
    5. The memory controller writes the value 84 to the data bus.
    6. The CPU then reads the value 84 from the data bus.
    • ddress space are mapped to I/O devices.
    • The CPU communicates with the device by reading/writing to its assigned memory address(es).
    • No special CPU instructions are needed for I/O.
  • Port-Mapped I/O (PMIO):
    • Devices are assigned an I/O port (a separate address space from memory).
    • Special CPU instructions are used to access I/O devices via their port numbers.
    • x86 CPUs support both MMIO and PMIO.
  • Device Controllers:
    • I/O ports and MMIO addresses generally refer to a device controller.
    • The controller provides an interface for the CPU to request operations (read/write) on the device.
    • The actual data on the device (e.g., bytes on a hard drive) is not directly mapped into address space.



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KembaraXtra-Computer Science – CPU (Central Processing Unit)
I. Central Processing Unit (CPU) Fundamentals
A. Role of the CPU
  • Executes program instructions.
  • Enables computers to run diverse software.
  • Implements a specific set of instructions.
B. Types of CPU Instructions
  • Memory Access: Reading and writing data to memory.
  • Arithmetic: Performing calculations (add, subtract, multiply, divide, increment).
  • Logic: Executing logical operations (AND, OR, NOT).
  • Program Flow: Controlling the order of instruction execution (jump, call).
C. Program Execution
  • Programs are sequences of CPU instructions stored in memory.
  • The CPU fetches and executes these instructions in order.
  • Analogy: CPU is the cook, program is the recipe, instructions are the steps.
II. Instruction Set Architectures (ISAs)
A. ISA Definition
  • A family of CPUs that share the same instruction set.
  • Defines how a CPU works.
  • Software built for a specific ISA can run on any CPU implementing that ISA.
B. Prevalent ISAs
  • x86:
    • Dominant in desktops, laptops, and servers.
    • Originated with Intel's 8086 processor.
    • Includes processors from Intel and AMD.
    • Maintains backward compatibility (older software runs on newer CPUs).
    • Generations: 16-bit, 32-bit (IA-32), and 64-bit (x64 or x86-64).
  • ARM:
    • Predominant in mobile devices (smartphones, tablets).
    • Developed by ARM Holdings and licensed to manufacturers.
    • Often used in System-on-Chip (SoC) designs.
    • Known for low power consumption and cost.
    • Versions: 32-bit and 64-bit.
C. Processor Bitness (Word Size)
  • Refers to the number of bits a CPU can process at once.
  • Indicates the size of registers, address bus, and data bus.
  • Examples: 32-bit CPU, 64-bit CPU.
III. CPU Internals
A. Key Components
  • Processor Registers:
    • Internal storage locations for temporary data during processing.
    • Fast access but small capacity.
    • Implemented in the register file using SRAM.
  • Arithmetic Logic Unit (ALU):
    • Performs logical and mathematical operations.
    • Receives operands and an operation code as input.
    • Outputs the result and status.
  • Control Unit:
    • Directs the CPU, coordinating with registers, ALU, and memory.
    • Works in a repeating cycle: fetch, decode, execute.
    • Uses the program counter (PC) to track the memory address of the next instruction.
B. Fetch-Decode-Execute Cycle
  1. Fetch: Retrieve instruction from memory address indicated by the program counter (PC).
  2. Decode: Interpret the instruction.
  3. Execute: Perform the action specified by the instruction, using the ALU and registers as needed.
IV. Performance Enhancements
A. Clock Speed
  • Controls the rate at which the CPU transitions between states.
  • Measured in gigahertz (GHz).
  • Higher clock speed generally means more instructions per second.
  • Limited by heat generation and logic gate speed.
B. Multicore CPUs
  • CPUs with multiple processing units (cores).
  • Each core is an independent processor.
  • Enables parallel execution of instructions.
  • Software must be designed for parallelism to fully utilize multicore CPUs.
C. CPU Cache
  • Small amount of memory within the CPU that stores frequently accessed data.
  • Reduces the need to access main memory.
  • Levels: L1 (fastest, smallest), L2 (slower, larger), L3 (slowest, largest).
  • Can be core-specific (L1) or shared (L2, L3).
V. Key Terms
  • Instruction Set Architecture (ISA): The instruction set that a CPU family uses.
  • x86: A popular ISA used in most desktop computers.
  • ARM: A popular ISA used in most mobile devices.
  • Register: Small, fast storage location within the CPU.
  • ALU (Arithmetic Logic Unit): Performs arithmetic and logical operations.
  • Control Unit: Coordinates CPU operations.
  • Program Counter (PC): Holds the address of the next instruction to execute.
  • Clock Speed: The rate at which a CPU executes instructions (GHz).
  • Multicore: A CPU with multiple processing cores.
  • Cache: Small, fast memory within the CPU for frequently accessed data. L1, L2, and L3 are different levels of cache.



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KembaraXtra-Computer Science - Main Memory

1. Purpose of Main Memory
• Stores program instructions and data needed for execution.
• Example: Word processor program, document content, editing state.
• Stores data as bits (1s and 0s) that the CPU can access.

2. Types of Memory
• SRAM (Static Random Access Memory):
- Uses flip-flops to store bits.
- Static: Retains data as long as power is supplied.
- Faster, more expensive.
- Used in cache memory (where speed is critical).

• DRAM (Dynamic Random Access Memory):
- Uses a transistor and capacitor to store bits.
- Dynamic: Capacitor charge leaks, so data must be periodically refreshed (rewritten).
- Slower, less expensive.
- Commonly used for main memory.

3. Memory Organization
• Internally organized as grids of memory cells (each storing 1 bit).
• Cells are accessed using two-dimensional coordinates.
• Multiple grids are accessed in parallel to read/write multiple bits at once (e.g., a byte).

4. Memory Addresses
• Memory Address: A numeric value that identifies a specific location in memory.
• Byte-Addressable: Each memory address refers to 8 bits (1 byte) of data.

5. Example: 64KB Memory System
• Memory Size: 64KB (64 x 1024 = 65,536 bytes).
• Address Range: 0 to 65,535 (0x0000 to 0xFFFF in hexadecimal).
• Address Representation: Binary numbers.

• Calculating Bits Required for Addressing:
- 2^n = number of unique addresses
- n = log₂(number of unique addresses)
- For 65,536 bytes: log₂(65,536) = 16 bits.
- Alternatively: 0xFFFF (hex) = 4 hex characters × 4 bits/character = 16 bits.
• Significance of Number of Bits: Limits the maximum amount of memory the computer can access.

6. Memory Layout Example
• Memory addresses (in binary or hex) are associated with data bytes.
• Example: Storing the ASCII string "Hello" starting at address 0x0002:

Memory Address   Data Byte (Hex)   Data as ASCII
0000             00
0001             00
0002             48                H
0003             65                e
0004             6C                l
0005             6C                l
0006             6F                o
0007             00                (Null Term.)

• Null Terminator: Some languages use a null terminator (byte equal to 0) to mark the end of a string.

7. Memory Inspection Tools
• Display memory contents in hexadecimal format.
• Show a memory address followed by 16 bytes of data at that address and the subsequent 15 addresses.

8. Modern Memory Sizes
• Modern devices have much larger memories (GBs).
• Example: Smartphones (1GB+), Laptops (4GB+).

9. Practice: Calculating Bits for 4GB Memory
• 4GB = 4 × 2³⁰ bytes = 2² × 2³⁰ = 2³² bytes
• log₂(2³²) = 32 bits required to address 4GB of memory.

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KembaraXtra-Case Law-Computer Hardware Overview
I. The Essence of a Computer: Programmability
  • Limitation of Hardware-Defined Features: Hard-wiring features into a circuit's design restricts innovation and modification after manufacturing.
  • Programmability as a Key Differentiator: Computers can perform new tasks without hardware changes by accepting and executing instructions (a program).
  • Hardware vs. Software:
    • Hardware: Physical components of a computer (covered in this chapter).
    • Software: Instructions that tell the computer what to do (covered in the next chapter).
  • The ability to run software is what makes a computer a general-purpose device, instead of a fixed-purpose device
II. Minimum Hardware Requirements for a General-Purpose Computer
  1. Memory:
    • Main Memory (RAM): The primary memory used in a computer.
    • Volatility: Data is retained only while the computer is powered.
    • Random Access: Any memory location can be accessed in roughly the same amount of time.
    • A conceptual extension of simple memory devices like latches and flip-flops.
  2. Central Processing Unit (CPU):
    • Also called a processor.
    • Executes instructions specified in software.
    • Can directly access main memory.
    • Microprocessors: CPUs on a single integrated circuit (lower cost, improved reliability, increased performance).
    • A conceptual extension of digital logic circuits.
III. Input/Output (I/O) Devices
  • Necessity: Required for computers to interact with the outside world.
  • Function: Facilitate communication into the computer (input) and out of the computer (output).
  • Examples: Not explicitly mentioned in the provided text, but think of things like keyboards, mice, monitors, printers, network interfaces, etc.
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KembaraXtra-Case Law-3-Bit Counter

Core Concept

  • A 3-bit counter is a digital circuit that counts from 0 to 7 in binary.
  • It consists of three memory elements (flip-flops), each representing a bit.
  • A clock signal synchronizes state changes (increments) of these bits.

Binary Counting Review

Table 6-5: Shows the decimal equivalents of 3-bit binary numbers.

Binary Decimal
000 0
001 1
010 2
011 3
100 4
101 5
110 6
111 7

Memory Element Assignment

  • Table 6-6: Assigns each bit of the 3-bit number to a memory element (Q0, Q1, Q2).
  • Q0 = Least Significant Bit (LSB)
  • Q2 = Most Significant Bit (MSB)
All 3 bits Q2 Q1 Q0 Decimal
000 0 0 0 0
001 0 0 1 1
010 0 1 0 2
011 0 1 1 3
100 1 0 0 4
101 1 0 1 5
110 1 1 0 6
111 1 1 1 7

Pattern Recognition

  • Q0: Toggles (changes state) on every clock pulse.
  • Q1: Toggles when Q0 was previously 1 (high).
  • Q2: Toggles when both Q1 and Q0 were previously 1 (high).
  • General Rule: Each bit (except Q0) toggles when all preceding bits are 1.

Implementation with T Flip-Flops

  • T flip-flops are ideal for building the counter due to their toggling behavior.
  • Figure 6-15: Illustrates the 3-bit counter circuit.
  • All flip-flops share the same clock signal for synchronization.
  • T0 is connected to 5V, ensuring Q0 toggles with each clock pulse.
  • T1 is connected to Q0, so Q1 toggles when Q0 is high.
  • T2 is connected to Q0 AND Q1, so Q2 toggles when both Q0 and Q1 are high.

Applications

  • Counters can be used in vending machines to track the number of coins inserted.
  • Up/Down counters (like the 74191 IC) can both increment and decrement the count.

Key Takeaway

  • Complex digital systems (like counters) can be built from simpler components (transistors, logic gates, flip-flops) through a process of encapsulation, hiding internal details and complexity.
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